1. Field of the Invention
The present invention relates generally to apparatus and methods for generating clock signals for computer buses and, more particularly, to such apparatus and methods that select frequencies for these clock signals so as to optimize performance of computer devices without exceeding a computer system's power budget or thermal budget.
2. Related Art
Performance of many electronic devices, such as processors, memory and graphic controllers, depends on clock frequencies at which these devices operate. Such devices are typically connected to buses or other circuits that supply the devices with clock signals. A clock signal is typically a precisely timed train of square-wave pulses. The clock frequency of a bus is commonly referred to its “bus speed”, and a time period between two successive clock pulses is commonly referred to as a “clock cycle” or “bus cycle”.
A clock signal determines the speed at which a device operates. Typically, a device performs a fixed number of operations per clock cycle. For example, a clock signal determines the frequency at which a processor executes instructions, although some processors internally multiply their clock signals by a fixed factor, such as 4. Similarly, a clock signal determines the frequency with which data can be sent to, or retrieved from, a memory, network interface, disk controller or other peripheral, hence determining the device's “bandwidth”. For example, if a memory is capable of accepting or supplying 32 bits (four bytes) of data at one time, and its clock frequency is 200 MHz, then the memory's bandwidth is 4 bytes×200 MHz=800 MBytes/Sec. A similar analysis applies to other devices. Thus, in general, electronic devices deliver higher performance when they operate at higher clock frequencies or bus speeds. Market demands for ever increasing performance levels, coupled with technological advances that enable production of devices that operate at higher clock frequencies, have, over time, led to use of progressively higher device clock frequencies.
Electronic devices consume electricity and dissipate waste heat. Excess heat can damage electronic devices, so these devices must be adequately cooled. Heat dissipation, therefore, poses a problem, especially in high-density systems. Unfortunately, higher clock speeds generally cause electronic devices to consume more electricity and dissipate more heat. For example, whenever a CMOS node (a common component in electronic devices) changes binary state, it must charge or discharge its load capacitance, which causes it to draw electric current or lose some of its stored energy in the form of heat. The rate at which CMOS nodes in an electronic device change states is related to the device's operating frequency, so dynamic power consumption and heat dissipation by such a device are generally proportional to the device's clock frequency.
Systems are typically designed to operate within a power/thermal budget. That is, each system is designed to provide up to a predetermined maximum amount of electrical power to devices within the system and to dissipate up to a predetermined maximum amount of heat generated, in aggregate, by these devices. Systems with expansion slots that can be selectively loaded with zero or more expansion modules, such as PCI slots, AGP slots or memory sockets, are typically designed with a power/thermal budgets that assumes a “worst-case” scenario, i.e. all the expansion slots will be filled. For example, such systems typically include power supplies that can handle the maximum number of expansion modules that can be installed into the expansion slots. In addition, the bus speeds are set such that the systems' thermal budgets will not be exceeded, even if all the expansion slots are filled.
This conservative design philosophy artificially limits clock speeds, and therefore performance, of installed devices, especially when a system is not fully populated with expansion modules. Potential performance by some or all of the installed devices is foregone, because, in a system that is not fully populated with expansion modules, at least some of the installed devices could operate at higher clock frequencies without exceeding the system's power or thermal budget. Thus, although purchasers pay premiums for devices that are capable of high performance, prior art design philosophies prevent these purchasers from fully benefiting from the performance potential of these devices.